Digital Light Innovations Graphic: Discovery™ D4100

DLP Discovery™ D4100

Looking for more? Unlock the full the capabilities of this best-selling development kit with the DLi41xx Bundle Series!

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The DLP Discovery™ D4100 is a development kit capable of extremely fast switching speeds, offering high-resolution performance in spatial light modulation. With Visible and Ultraviolet optimizations available, the D4100 is ideal for a variety of applications across industrial, scientific, medical, security, & telecom markets. When resolution and speed are the objectives, this is the development kit for you.

The D4100 is based on Texas Instruments’ (TI) Discovery™ DLP®410 Chipset, which includes the Digital Micromirror Device (DMD) that enables users to digitally modulate, steer, and project light with speed, precision, and efficiency. The D4100 Controller Board includes the ultra high-performance DLPC410 Controller with a user-programmable Xilinx Virtex 5 FPGA for developing a custom application interface.

The D4100 is available in three DMD sizes: 0.7″ XGA, 0.95″ 1080p, & 0.96″ WUXGA. The DLP®7000 DMD employs 1024×768 mirror arrays and is capable of binary pattern rates up to 22,727Hz/290Hz 8-bit grayscale, with reliable data transfer rates of 25.6 Gb/s. The DLP9500 .95″ 1080p (1920×1080) & the DLP9600 .96″ WUXGA DMD’s enables users the reach binary pattern rates up to 10,638Hz/250Hz 8-bit.

To aid in proof of concept development and ease of use, DLi worked with TI to create Discovery Explorer™ Control Software & API which provides users the fundamental tools to deploy the D4100 out-of-the-box and to develop a custom application interface through LabVIEW, MATLAB, C++, .NET, or Visual Basic. The D4100 has onboard USB2.0 for transferring patterns from a Windows XP PC to the controller board, two EXP standard compatible I/O connectors for interface expansions such as the D2D, and a 4GB DDR2 SODIMM connector for advanced DMD product development.

* Expand the D4100 capabilities with a DLi41xx Bundle – D2D DVI Interface, ALP 4.1 Basic Controller Suite, ALP 4.1 High-Speed Controller Suite


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Graphic: DLP® 4100 Chipset Block Diagram

D4100 Key Specifications

DMD Format
0.7″ XGA
0.95″ 1080P
0.96″ WUXGA
DMD Package
Type A Type A Type A
DMD Interface
2 x LVDS 2 x LVDS 2 x LVDS
Mirror Blocks
16 16 16
Mirror Pitch
13.68 um 10.8 um 10.8 um
Reset and Settle Time
13.4 us (est) 13.4 us (est) 13.4 us (est)
Clock Rate
400 MHz DDR 400 MHz DDR 400 MHz DDR
Data Lines
32 LVDS pairs 64 LVDS pairs 64 LVDS pairs
Data Transfer
25.6 Gbs 51.2 Gbs 51.2 Gbs
Pattern Rates (binary/8-bit)
32,552Hz/1,900Hz 23,148Hz/1,700Hz 23,148Hz/1,700Hz
Row Address
Phased Reset, Random Access, Single Line, & Global/Full Array
Xilinx Virtex 5 LX50 Application FPGA, USB 2.0, SODIMM (up to 4GB DDR2 SDRAM)
Power Supply, Dual 120-pin EXP connectors, Mictor & JTAG Test/Debug Headers, Cypress 68013 USB Controller, SPI Flash, Remote DMD Board w/ Flex Cable